There is a semiconductor memory device that includes three-dimensionally arranged memory cells. For example, a NAND memory device includes a memory hole piercing multiple electrode layers in the stacking direction of the multiple electrode layers. The memory cells are provided in the interior of the memory hole and are disposed at portions where the electrode layers cross a semiconductor layer extending in the stacking direction of the multiple electrode layers. In the manufacturing processes of such a memory device, it becomes difficult to form the memory holes as the number of stacks of electrode layers increases.